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Hashing Processors Based on SHA-1 Algorithm

Hashing processors are used to calculate hash functions within the specialized information security systems, including systems for generation of the digital signatures and authentication systems.

Characteristics

he development is based on specification of theSHA-1 hashing algorithm(FIPS180-1). Processed data block size is 64 bits. WISHBONE SlaveRev.B.1 interfacewith separate 32-bit input/output buses. The development is represented as a technologically independent VHDL-model.

Processors of Symmetric Block Encryption Based on Triple Des Algorithm

They are used as a part of specialized information security systems, and as a part of devices for universal systems, e.g. in personal computers, connected to the global and local area networks.

Characteristics

The development is based onDES encryption standard (FIPS 46-3). ECB,CBC,CFB,OFBmodes are available. Processed data block size is 64 bits. Key size is 2х56 bits. The development is represented as a technologically independent VHDL-model.

Hashing processors Based on MD5 Algorithm

Hashing processors are used to calculate hash functions within the specialized information security systems, including systems for generation of the digital signatures and authentication systems.

Characteristics

The development is based on specification of theMD5 hashing algorithm(RFC1321). WISHBONE SlaveRev.B.1 interfacewith separate 32-bit input/output buses. The development is represented as a technologically independent VHDL-model.

Neural Network Technology of Data Gaps Elimination

We used the approach based on the auto-associative neural networks of direct distribution.

The purpose of training of the network is the most accurate reproduction of the input data in the output. If the input data contains gaps, an error of the training may be significant. Then we make changes of the value of missed elements and the training repeats. When the error does not exceed the threshold, the matrix of the input data without gaps can be saved as a part of the complete database.

VLSI Schemes Complex for Synthesis of the Real-time Artificial Neural Networks

The complex is designed for synthesis of the artificial neural networks working in real time based on the programmable logic device (PLD), and provides the following functions: calculation of sumof the paired products; calculation of the transfer function; implementation of themodules of learning management and functioning of the neural element; creation of the neural elements of different types; implementation of the different kinds of artificial neural networks on their basis.

System for Modeling the Wireless Sensor Networks of the Environmental Monitoring

It is designed for synthesis and verification of the architectural solutions for creating the wireless sensor networks of the environmental monitoring.

Wireless sensor networkmay consist of plurality of chemical sensors, arranged in a particular area and interactingwith each other via radio communication, and the root node,which receive the information from sensors.